In large scale integrated circuits it is often desirable to be able to output by means of an output stage an output voltage whose voltage swing exceeds the actual supply voltage of the respective semiconductor circuit technology and/or the rated voltage of the transistors respectively provided. Modern CMOS, complementary metal oxide semiconductor, circuit technologies, for example, have supply voltages of 3.6 V or less.
The constantly decreasing thickness of the gate oxide in CMOS circuits with the aim of utilizing the silicon area in a highly efficient manner leads to ever further reduced supply voltages. On the other hand, output voltages 3.6V or less often do not suffice for driving sensors or actuators directly with an output stage of the integrated circuit.
A common possibility for solving this problem is provided by means of so-called open-drain or open-collector outputs to which external pull-up resistors or on-chip pull-up resistors are connected in order to form an output stage.
In n-channel MOS structures, open-drain outputs can be realized via so-called NMOSH (High Voltage n-Type Metal Oxide Semiconductor) components, which are distinguished by suitability for comparatively high voltages. For this purpose, NMOSH components normally have weakly doped n-type well regions used as drain regions and are provided with an additional field oxide region for enlarging the gate oxide at the drain edge of the channel.
Since, in the conventional MOS circuit technologies, separate p-type wells in n-type well regions are not available for creating a corresponding p-type drain region, a complementary solution to NMOSH components is not available for p-channel components. In p-channel components with connected source and n-type well terminals which are produced in integrated circuit technology by means of a typical 3.3V fabrication process, the following maximum permissible voltages accordingly hold true: the source voltage with respect to gate voltage max. 3.6V, gate voltage with respect to drain voltage max. 3.6V, source voltage with respect to drain voltage max. 3.6V, source and n-type well voltage with respect to p-type substrate maximum 15V.
The passive pull-up components described have the disadvantage that a comparatively large amount of current is wasted if the resistance values of the pull-up resistors are low. On the other hand, the edge steepness of the rising edge is greatly limited in the case of larger resistances.
A similar problem area arises for analog outputs, where an external driver stage in a different fabrication technology has to be used to obtain the desired voltage swing at the output. In order for example to drive a high-voltage NMOS switch that can switch a voltage of up to 600V, a gate voltage of 10V is typically necessary in order to ensure a good switch-on state.
External driver stages are used for providing an analog output voltage having a voltage swing that is to say a dynamic amplitude, of 7V, as is provided in modern so-called power line modem applications. In this case, the integrated circuit has a differential output stage connected to the actual output via an external current mirror formed in bipolar circuit technology.
The document EP 1 326 337 A1 shows a push-pull driver for high voltages that is realized in standard CMOS. An upper, a middle and a lower transistor form a series circuit. In this case, diodes are provided which, together with a clamping voltage effect a clamping of the gates of the middle and lower transistors.